9–13 Sept 2024
Wanda Realm Beijing
Asia/Shanghai timezone
Registration Deadline: August 9 (23:59 UTC+8), 2024; Paper Submission Deadline: September 5 (23:59 UTC+8), 2024

Design and performance test of 8 channel 125 MS/s digitizer with 16-bit resolution for BPM and LLRF application

WEP63
11 Sept 2024, 14:20
1h 30m
China Hall 3

China Hall 3

Poster Presentation MC7: Data Acquisition and Processing Platforms WEP: Wednesday Poster Session

Speaker

Mr Qiutong Pan (Tsinghua University)

Description

In an accelerator, the Beam Position Monitor (BPM), which typically consists of beam position probe and electronics, plays a role of providing information on the position of the beam in the vacuum chamber at the monitor location. The low-level RF (LLRF) control system is mainly used to control the high-frequency field and resonant frequency of the accelerating cavity to ensure the stable operation of the accelerator and output high-quality particle beams. In order for particle gas pedals to deliver higher quality particle beam streams, high performance electronics are needed to match them. This paper introduces the development and testing of an 8-channel 16bit 12MSPS FMC card for BPM/LLRF applications. Test results show that this design is characterized by low noise and meets the requirements of BPM/LLRF applications.

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Primary author

Mr Qiutong Pan (Tsinghua University)

Co-authors

Haoyan Yang (Tsinghua University) Bo Liang (Tsinghua University) Lin Jiang (Tsinghua University) Mr Liangjun Wei Tao Xue (Tsinghua University in Beijing) Jianmin Li (Tsinghua University in Beijing)

Presentation materials

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