Speaker
Description
The growing demand for high-throughput XAS measurements at next-generation synchrotron light sources makes On-the-Fly Scan indispensable. Original software-based implementations improved efficiency but were limited by slow PC communication (~8 Hz) and soft-trigger jitter (<10 ms), restricting precise synchronization for multi-axis, non-linear trajectories and long-range energy scans.
This work introduces a hardware-level fly-scan architecture that deeply integrates a Field-Programmable Gate Array (FPGA) into the EPICS control system at the TPS 35A beamline. Acting as a hardware acceleration core, the FPGA eliminates OS-induced latency and leverages high-speed parallel processing to achieve deterministic control. The system synchronously encapsulates ADC detector data, precise time tags, and high-speed position encoder feedback with nanosecond-level precision, enabling real-time trajectory compensation. This capability supports nano- to micro-second–scale measurements, opening new opportunities for time-resolved XAS. By replacing software delays with hardwired logic, this EPICS-FPGA paradigm delivers a standardized, stable, and highly efficient XAS measurement platform, critical for photon dose-sensitive samples. It fully realizes the hardware upgrade envisioned by previous software-based solutions, setting a new benchmark for high-performance beamline control.
| Paper status | Proceeding files received |
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