Speaker
Description
BPM signal processing uses digital or analog down-conversion to report phase and magnitude at a single frequency, however the digitized BPM signal may contain many more harmonics and a larger bandwidth of information which may be useful. An FPGA implementation is described which captures the full bandwidth BPM signal with minimal processing and resources. This approach can be scaled to captures as many beam harmonics as needed, limited only by the bandwidth of the ADC used. The periodic nature of the BPM signal is utilized to use time-interleaved sampling to effectively multiply the sampling rate of the ADC.
Funding Agency
Work supported by the U.S. Department of Energy Office of Science under Cooperative Agreement DE-SC0023633, the State of Michigan, and Michigan State University.
| Region represented | North America |
|---|---|
| Paper preparation format | Word |
