Speaker
Description
High-power RF systems in proton linear accelerators require reliable protection against abnormal conditions such as RF arcing and excessive reflected power. At KOMAC, the existing analog RF interlock system was upgraded to a digital platform based on a Zynq System-on-Chip architecture to improve operational flexibility and system integration.
The developed system digitizes forward, reflected, and pickup RF signals using simultaneous-sampling ADCs and performs real-time RF power and VSWR calculations in FPGA logic. Arc sensors, vacuum faults, and external protection signals are integrated into the digital interlock framework. Timing-critical functions are implemented in programmable logic, while control and monitoring are supported through an EPICS-based environment.
Experimental verification confirmed stable waveform acquisition and reliable interlock generation within the required protection time. Compared with the analog system, the digital platform improves maintainability, remote operation, and centralized monitoring while preserving fast protection performance.
Funding Agency
This study was supported by the Korea Multi-purpose Accelerator Complex (KOMAC) operation fund of the KAERI, the Ministry of Science and ICT (MSIT). KAERI ID no.524320-26
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