LINAC2026 - 33rd Linear Accelerator Conference

FPGA Machine Learning for ESS Beam Diagnostics using Vitis AI DPU and hls4ml on Xilinx Versal Board

Not scheduled

2h

Daejeon Convention Center

Poster Presentation MC4.A01: Beam diagnostics Poster Session

Speaker

Ziga Kroflic (Cosylab)

Description

In collaboration with the European Spallation Source (ESS) and Riga Technical University, we wanted to explore real-time ML model inference on FPGAs for beam waveform classification. To identify a viable solution, we evaluated two ML toolchains on the Xilinx Versal VCK190 adaptive SoC. The first uses the Vitis AI toolchain to integrate the DPUCVDX8G deep learning processing unit and 64-tile AI Engine in the Versal programmable logic. A custom ResNet50 retrained for seven beam waveform classes from the beam position monitor is compiled with Vitis AI framework and deployed at runtime. The second uses the hls4ml framework to convert a CNN-GRU Keras classifier trained on the same seven-class dataset to HLS C++ IP blocks. The model is partitioned into four AXI-Stream blocks to fit synthesis memory, with fixed-point quantization validated against the Keras reference. The Vitis AI toolchain achieved full hardware deployment with measured inference of 2-4 ms. The hls4ml IP blocks fit on the Versal FPGA with synthesis-estimated inference in the tens of microseconds, theoretically outperforming the DPU approach in latency, though demanding greater FPGA resource utilization.