Speaker
Description
The CERN Electrical Power Converters (EPC) group operates thousands of converters, most via the Function Generator/Controller (FGC) device family. Its new generation, FGC4, built on an AMD Zynq UltraScale+ MPSoC, will support future EPC applications. Some, like POPS+, require ultra low‑latency inter‑FGC communication. We present the FGC Private Network (FPN) protocol stack and library enabling this private, real‑time network.
FGC4 software runs on four Cortex-A53 cores: two of which are dedicated to real-time regulation on bare‑metal, and the other two run background and frontend services. The Programmable Logic (PL) hosts two GbE endpoints able to fetch application data via cache‑coherent DMA and transmit them over a PTP-synchronized switched Ethernet network, meeting a tight 10 µs control budget.
The FPN implementation is split between software and gateware. To ensure consistency, protocol-related definitions in C++, VHDL, as well as debugging utilities, are all generated from YAML definitions acting as the single source of truth.
The C++ library minimizes CPU usage without compromising on clarity, and supports interchangeable transport layers (PL GbE, generic Ethernet, UDP, file replay...) for desktop development, regression testing, and HIL.
This model‑driven, flexible and testable approach paves the way for POPS+ deployment on FGC4 and enables future EPC systems.
| In which format do you inted to submit your paper? | LaTeX |
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