17–22 May 2026
C.I.D
Europe/Zurich timezone

Real-Time Digital Decay-Rate Interlock for Storage-Ring Machine Protection at SLS 2.0

WEP6086
20 May 2026, 16:00
2h
C.I.D

C.I.D

Deauville, France
Poster Presentation MC6.T23: Machine Protection Poster session

Speaker

Mr Benoit Stef (Paul Scherrer Institute)

Description

Operators initially requested a di/dt-based machine-protection signal, but direct differentiation of the stored current proved too noise-sensitive, even with high-quality PCT measurements. Because beam lifetime and loss processes are more naturally expressed via the fractional rate of change of the stored current, the concept was redesigned around a digital decay-rate computation, providing a more stable and physically meaningful indicator of abnormal beam loss.

A real-time decay-rate interlock was implemented for SLS 2.0 using a Bergoz PCT and a CPCI-S.0 Zynq UltraScale+ MPSoC platform. The PCT signal is sampled at 250 MHz and processed through a multi-stage digital chain with CIC decimation, FIR filtering, adaptive smoothing, and sliding statistics. A dedicated fractional decay-rate algorithm runs on the real-time processing unit (RPU), tightly coupled to the FPGA fabric for deterministic execution.

The resulting decay-rate value feeds a hardware interlock path with a minimum-current guard and an FPGA latch, while redundant dual-PCT acquisition and processing chains further suppress false trips. Commissioning confirms accurate lifetime tracking and reliable detection of fast current-drop events, establishing this system as a key element of the SLS 2.0 machine-protection strategy.

In which format do you inted to submit your paper? LaTeX

Author

Mr Benoit Stef (Paul Scherrer Institute)

Co-authors

Cigdem Ozkan Loch (Paul Scherrer Institute) Dr Daniel Marco Treyer (Paul Scherrer Institute) Felix Armborst (Paul Scherrer Institute)

Presentation materials

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