Speaker
Description
Accelerators often use separate infrastructures for precise timing and machine protection, which increases cabling, integration complexity and operational overhead. We describe an approach that enhances a standard event-based timing system to provide fast beam interlock functionality on the same platform. Protection logic, flag distribution and rapid reaction paths are implemented directly in the timing firmware, allowing the existing hardware and fibre network used for device triggering to also transport low-latency interlock information. With timing and protection combined, interlock conditions can act immediately on timing outputs while established capabilities such as sequences, delay compensation and timestamping remain fully supported. The system offers flexible configuration of inputs, flags and outputs, and a single operator interface for both timing and protection workflows. Developed in collaboration with Nusano, this solution demonstrates a practical architecture for environments where precise timing and fast protection must operate tightly coupled.
| Paper status | Resubmitted proceeding files received and assigned to an editor. Accepted by Submitter. |
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