17–22 May 2026
C.I.D
Europe/Zurich timezone

The FPGA and Software Design of the SLS 2.0 BPM System

WEP6083
20 May 2026, 16:00
2h
C.I.D

C.I.D

Deauville, France
Poster Presentation MC6.T03: Beam Diagnostics and Instrumentation Poster session

Speaker

Jonas Purtschert (Paul Scherrer Institute)

Description

For the upgrade of the Swiss Light Source (SLS), a new Beam Position Monitor System (DBPM3) has been developed. Each system integrates three RF front-end modules (RFFEs) to acquire signals from button electrodes. Signal processing and conditioning are implemented in the FPGA and on multiple processing units within the Zynq UltraScale+ MPSoC.

DBPM3 is designed for use across multiple accelerators. Its versatility enables integration of different RFFEs depending on machine and signal characteristics. A core FPGA design and software framework remain consistent across all use cases, providing essential board support functionality.

The programmable logic (PL) section of the Zynq MPSoC implements three parallel processing channels per BPM channel, each with three downconversion stages offering different bandwidths for turn-by-turn, feedback, and monitoring applications. Position and charge calculations are performed at each stage, and the data are provided to the control system (EPICS). A pilot signal complements the beam signal to compensate for drifts.

Synchronization with the machine’s timing system and direct data transmission to the fast orbit feedback (FOFB) are also handled within the PL. The MPSoC’s APU (Application/Real-time Processing Unit) provides the control system interface. One RPU handles backend functionality and the other runs BPM-specific software, like a temperature control loop for the front-ends.

In which format do you inted to submit your paper? LaTeX

Author

Jonas Purtschert (Paul Scherrer Institute)

Co-authors

Boris Keil (Paul Scherrer Institute) Goran Marinkovic (Paul Scherrer Institute) Radoslaw Rybaniec (Paul Scherrer Institute)

Presentation materials

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