Speaker
Description
The Beam Interlock System (BIS) is the backbone of the machine protection system throughout the accelerator complex at CERN, from LINAC4 to the LHC. After 15 years of flawless operation, a new version of the BIS is currently being produced and will be installed in the LHC, SPS and North Area during CERN’s Long Shutdown 3, planned to start in 2026. Overall, more than 3,000 Printed Circuit Boards will be produced and assembled outside CERN. In addition, more than 120,000 lines of firmware and supporting scripts are written to implement the critical and monitoring functionalities of the BIS. Both hardware and firmware need to be thoroughly tested before installation and operation to guarantee the high levels of reliability and availability required by the operation of the accelerators. In this paper we present the testing methodology including the development of dedicated testbeds for hardware validation, the use of comprehensive simulation and continuous integration for firmware development, and the implementation of automated tests for system-level functional validation.
Region represented | Europe |
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