Speaker
Description
The Safe Machine Parameter (SMP) system is an electronic hardware-based system which has been an integral part of the LHC’s machine protection strategy since it started operation. Its primary objective is to provide several parameters and interlock signals to critical machine protection users across the LHC and SPS accelerators, whilst prioritizing high reliability and availability. After almost two decades of operation, there is a need to upgrade the SMP hardware electronics. In the High Luminosity LHC era the requirements of connected systems have changed, leading to new system functions and operational requirements which must be integrated into the new design. This paper details the electronic design considerations of developing the second-generation SMP. The general distribution of parameters relies on the CERN WhiteRabbit timing network renovation, for which dedicated high-precision clock components were selected and tested on a prototype board. Details of the hardware design and validation are discussed, along with the comprehensive upgrades aimed at delivering an SMP system with expanded monitoring and diagnostic features.
| Region represented | Europe |
|---|---|
| Paper preparation format | LaTeX |
