Session

MODR MC05 FPGA and Embedded Systems

MODR
22 Sept 2025, 16:00
Red Lacquer Room (Palmer House Hilton Chicago)

Red Lacquer Room

Palmer House Hilton Chicago

17 East Monroe Street Chicago, IL 60603, United States of America

Conveners

MODR MC05 FPGA and Embedded Systems

  • Michael Costanzo (Brookhaven National Laboratory)
  • Scott Cogan (Facility for Rare Isotope Beams)
  • Evangelia Gousiou (European Organization for Nuclear Research)

Presentation materials

There are no materials yet.
Mr Tong Xu (Argonne National Laboratory)
22/09/2025, 16:00
MC05: FPGA and Embedded Systems
Contributed Oral Presentation

A new FPGA-based Global Trigger system is intended for the Phase-II Upgrade of the ATLAS experiment at the High-Luminosity Large Hadron Collider (HL-LHC). The system will process data from the experiment with fixed latency to allow the selection of individual collisions of proton bunches with physical potential. Intermediate data from the Global Trigger system are read out for the collisions...

Yves-Marie Abiven (Synchrotron soleil)
22/09/2025, 16:15
MC05: FPGA and Embedded Systems
Contributed Oral Presentation

Ten years ago, the PandABox platform was first introduced in Melbourne during the MOCRAF workshop. Originally developed through a collaboration between Synchrotron SOLEIL and Diamond Light Source, PandABox was designed to support multi-technique scanning and feedback applications. Since then, the platform has been widely adopted across synchrotron facilities worldwide—including SOLEIL,...

Adrian Barnes (Lawrence Livermore National Laboratory)
22/09/2025, 16:30
MC05: FPGA and Embedded Systems
Contributed Oral Presentation

As the world’s most energetic laser, the National Ignition Facility (NIF) plays a critical role in advancing high energy density physics and inertial confinement fusion research. The NIF relies on a distributed control system to automate setup and execution of experiments. This includes over 1,000 embedded controllers split between 17 distinct types. Most of these controllers were designed in...

Alen Arias Vazquez (European Organization for Nuclear Research)
22/09/2025, 16:45
MC05: FPGA and Embedded Systems
Contributed Oral Presentation

The Distributed I/O Tier (DI/OT) project was initially launched to develop a common, modular hardware platform for custom electronics at the lowest layer of the CERN control system. With the adoption of the AMD Zynq UltraScale+ MPSoC for the high-performance System Board, DI/OT has also become a reference platform for integrating System-on-Chip (SoC) technology into CERN’s control system. This...

Chao Liu (SLAC National Accelerator Laboratory)
22/09/2025, 17:00
MC05: FPGA and Embedded Systems
Contributed Oral Presentation

The low-level RF (LLRF) systems for linear accelerating structures are typically based on heterodyne architectures. The linear accelerators normally have many RF stations and multiple RF inputs and outputs for each station, so the complexity and size of the LLRF system grows rapidly when scaling up. To meet the design goals of being compact and affordable for future accelerators, or upgrade of...

Telles René Silva Soares (Brazilian Synchrotron Light Laboratory)
22/09/2025, 17:15
MC05: FPGA and Embedded Systems
Contributed Oral Presentation

A 4th-generation synchrotron light source demands high-performance mechatronic systems to meet stringent requirements for optical focusing, energy filtering, beam stability, sample positioning, and scanning. SIRIUS*, the facility the Brazilian Synchrotron Light Laboratory (LNLS), has achieved exceptional beam quality, supporting advanced scientific experiments through the continuous...

Paul Bachek (Brookhaven National Laboratory)
22/09/2025, 17:30
MC05: FPGA and Embedded Systems
Contributed Oral Presentation

The EIC Common Platform is a modular system architecture which will serve as the basis for the EIC Controls Systems. It consists of a SoC based carrier board with up to two independent pluggable FPGA based Daughtercards. Different types of Daughtercards have custom electronics catering to the specific needs of an application. All types of Daughtercards will have FPGA logic to support a common...

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