7–11 Sept 2025
Teaching Hub 502
Europe/London timezone

Development of Analog Front-End Module for the BPM Signal Processor at SSRF

WEPCO29
10 Sept 2025, 16:00
2h
Teaching Hub 502

Teaching Hub 502

The University of Liverpool 160 Mount Pleasant L3 5TR Liverpool
Poster Presentation MC03: Beam Position Monitors WEP

Speaker

Longwei Lai (Shanghai Advanced Research Institute)

Description

A new BPM processor is being developed to address the ageing of BPM signal processors and the new demand for synchronised data acquisition at the storage ring of Shanghai Synchrotron Radiation Facility (SSRF). The BPM processor consists primarily of a digital carrier board and an analog front-end (AFE) module. The AFE is responsible for the conditioning of the BPM output RF signal and for the compensation of long-term drift. This paper presents the design of the AFE module and gives an evaluation of its performance. The experimental results show that the AFE module under development fully satisfies the high resolution and high stability requirements of the upgraded SSRF BPM processor.

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Authors

Hang Jiang (Shanghai Advanced Research Institute, Nanchang University) Longwei Lai (Shanghai Advanced Research Institute) Qiurong Yan (Nanchang University) Shilong Wang (Shanghai Advanced Research Institute, Nanchang University)

Presentation materials

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