Conveners
WEBR MC04 Hardware Architecture and Synchronization
- Oscar Matilla (ALBA Synchrotron Light Source)
- Joseph Sullivan (Argonne National Laboratory)
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Ran Hong (Argonne National Laboratory)24/09/2025, 11:00MC04: Hardware Architecture and SynchronizationContributed Oral Presentation
The Fast Event System, a global time base and event-based trigger distribution system, has been developed and commissioned for the Advanced Photon Source Upgrade (APS-U) and the linear accelerator (LINAC) refurbishment projects. The hardware components developed by Miro-research Finland (MRF), including event masters (EVMs), event receivers (EVRs), and event fan-out modules, are installed in...
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Dr Di Wang (High Energy Accelerator Research Organization)24/09/2025, 11:15MC04: Hardware Architecture and SynchronizationContributed Oral Presentation
Event timing systems are critical for the synchronization of beam diagnostics and accelerator control at KEK LINAC. Such systems have historically relied on VME-based modules since 2008, such as the MRF 230 series event generator and event receiver. However, with some VME modules approaching its market end-of-life, transitioning to modern platforms like MicroTCA is becoming imperative. This...
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Giorgio Giuseppe Moscardi (European Organization for Nuclear Research)24/09/2025, 11:30MC04: Hardware Architecture and SynchronizationContributed Oral Presentation
After more than 30 years of service, CERN's accelerator timing system is being renovated, moving from the existing distribution infrastructure based on the RS-485 technology and legacy hardware modules, to a new one based on White Rabbit.
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Developed at CERN, White Rabbit Timing (WRT) is a generic toolkit composed of the White Rabbit Event Node (WREN) - a System-on-Chip based hardware module,... -
Mark Austin (Fermi National Accelerator Laboratory)24/09/2025, 11:45MC04: Hardware Architecture and SynchronizationContributed Oral Presentation
The current Timing System at Fermilab has been around for 40 years and currently relies on 7 CAMAC crates and over 100 CAMAC cards to produce the Tevatron Clock (TCLK). Thanks to the ingenuity of those before us, this has allowed Fermilab the flexibility to change the timing and EVENTs for its accelerator as beamlines and projects have changed over the years. With the advent of the Proton...
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Fang Liu (Institute of High Energy Physics)24/09/2025, 12:00MC04: Hardware Architecture and SynchronizationContributed Oral Presentation
The High Energy Photon Source (HEPS), a fourth-generation synchrotron light source developed by the Institute of High Energy Physics (IHEP), is currently in the commissioning phase. As a critical subsystem, the HEPS timing system generates and distributes synchronized triggers and clock signals to both the accelerator components and beamline instruments, coordinating the entire facility's...
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Grzegorz Daniluk (European Organization for Nuclear Research)24/09/2025, 12:15MC04: Hardware Architecture and SynchronizationContributed Oral Presentation
The Distributed I/O Tier (DI/OT) project was launched to develop a common, modular hardware platform for custom electronics at the lowest layer of the CERN control system. Traditionally, this layer—closest to the accelerator and often exposed to radiation—relied on highly specialized, custom-designed devices with little reusability across subsystems. DI/OT addresses this limitation with a 3U...
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