Speaker
Description
The Powering Interlock Controller (PIC) plays a critical role in supervising the powering conditions of the superconducting magnet circuits of the Large Hadron Collider (LHC), reducing the risk of severe equipment damage. It ensures that conditions are met before granting the powering permit and reacts within milliseconds to remove it if conditions become unsafe for operation. To enhance maintainability, modularity, and long-term sustainability, the PIC interlock system has been redesigned within CERN's UNICOS framework. This modernisation posed a major challenge: preserving the system’s stringent real-time constraints while adopting high-level programming in Structured Control Language for improved maintainability. This paper presents the strategies adopted to ensure the required response time, including execution path optimisations and efficient handling of interlocks within the UNICOS framework. We discuss the trade-off between standardisation and performance, the impact on system diagnostics and operation, and the validation process ensuring compliance with LHC safety requirements. This work serves as a reference for applying UNICOS in protection-critical systems while preserving real-time capabilities.
