Design of an upgraded analog signal digitizer to replace the MADC system at RHIC

WEPD014
24 Sept 2025, 16:30
1h 30m
Palmer House Hilton Chicago

Palmer House Hilton Chicago

17 East Monroe Street Chicago, IL 60603, United States of America
Poster Presentation MC05: FPGA and Embedded Systems WEPD Posters

Speaker

Paul Bachek (Brookhaven National Laboratory)

Description

A new general-purpose analog signal digitizer has been designed and prototyped to serve as an upgrade to the legacy Multiplexed Analog to Digital Converter (MADC) system currently in use around the RHIC accelerator and injector complex at BNL. The new system is a standalone rackmount chassis with an embedded System on a Chip (SoC). This is a departure from the traditional VME form factor used by most legacy controls equipment within the Collider Accelerator Department. New features include completely independent channels, real time digital signal processing, large sample buffers, built-in timing links, and high bandwidth network connectivity. Support is included for the legacy timing links as well as future compatibility with the EIC Timing Data Link. The core features, system architecture, and scheme for integration with the controls system network is presented.

Author

Paul Bachek (Brookhaven National Laboratory)

Co-authors

John Morris (Brookhaven National Laboratory) Michael Costanzo (Brookhaven National Laboratory)

Presentation materials

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