Speaker
Description
WREN is a versatile White Rabbit (WR) node developed for CERN's event-based timing system renovation. Thousands of WRENs are expected to be deployed across the entire CERN accelerator complex from 2027 onwards. Equipped with dedicated hardware and gateware, WREN integrates synchronisation in both TAI (International Atomic Time) and RF (accelerator Radio Frequency) timing. It can function as a TAI event transmitter and receiver, a Beam Synchronous (RF) transmitter and receiver, and is also capable of FPGA-based time-to-digital conversion and fine-delay generation.
WREN is highly adaptable for various timing and trigger distribution systems. It is available in multiple form factors, including PCIe, VME, PXIe, and uTCA. All boards are based on the Zynq UltraScale+ System-on-Chip (SoC), designed using the open-source KiCad tool and licensed under the CERN Open Hardware License (OHL). The gateware and software are also open source. This paper presents the WREN hardware modules, the gateware architecture, and potential customisations for applications beyond CERN. It also shares insights from the initial pilot deployments at CERN.
