Overview of the LCLS-II superconducting timing system design

TUPD077
23 Sept 2025, 16:00
1h 30m
Palmer House Hilton Chicago

Palmer House Hilton Chicago

17 East Monroe Street Chicago, IL 60603, United States of America
Poster Presentation MC04: Hardware Architecture and Synchronization TUPD Posters

Speakers

Carolina Bianchini Mattison (SLAC National Accelerator Laboratory) Daniel Sanchez (SLAC National Accelerator Laboratory)

Description

SLAC successfully delivered beam through the in-house firmware and software developed 1MHz Timing System for the new superconducting LINAC (SC-LINAC) LCLS-II. The SC Timing System hardware is ATCA based, the firmware and software architecture developed at SLAC, will be discussed in this poster.
SLAC has now the capability of delivering electron beam to the SC-LINAC and undulators up to 1MHz nominal rate. The beam pulses can also be directed into any of the intermediate and final 5 destinations along the copper and superconducting LINAC.

Author

Carolina Bianchini Mattison (SLAC National Accelerator Laboratory)

Co-authors

Alexander Ng (SLAC National Accelerator Laboratory) Daniel Sanchez (SLAC National Accelerator Laboratory) Matt Gibbs (SLAC National Accelerator Laboratory) Matthew Weaver (SLAC National Accelerator Laboratory) McClanahan Ryan (SLAC National Accelerator Laboratory) Michael Zelazny (SLAC National Accelerator Laboratory) Patrick Krejcik (SLAC National Accelerator Laboratory)

Presentation materials

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