Speaker
Description
The Distributed I/O Tier (DI/OT) project was initially launched to develop a common, modular hardware platform for custom electronics at the lowest layer of the CERN control system. With the adoption of the AMD Zynq UltraScale+ MPSoC for the high-performance System Board, DI/OT has also become a reference platform for integrating System-on-Chip (SoC) technology into CERN’s control system. This paper presents two key aspects of DI/OT’s role as a SoC reference platform: (1) tools and methodologies to streamline end-application development and (2) integration of DI/OT into CERN’s control system as a Front-End platform. The first aspect includes a user-friendly build system and reference design that enable seamless integration of custom FPGA IP cores and Linux device tree entries while providing the reference design with essential DI/OT functionality and monitoring interfaces for local crate peripherals. This build system also automates synthesis and low-level software compilation to generate a complete bootable binary. The second aspect covers a fail-safe and reliable SoC boot mechanism, network booting of FECOS (a Debian-based CERN Linux image for Front-End Computers), and integration with standard monitoring services.
Keywords: System-On-Chip, DI/OT, integration, build-system, fail-safe, monitoring
