Speaker
Description
We are developing a low-level RF (LLRF) controller based on RF System on Chip (RFSoC) for an electron linac. The AMD Zynq RFSoC was employed for this controller, which has a large-scale high-speed FPGA together with high-speed ADCs and DACs (8 channels each). The RFSoC also has an application CPU for Linux and a real-time CPU for time-critical tasks, capable of a 1 kHz repetition rate. A general-purpose pizza-box module with an RFSoC was designed and manufactured, and firmware for LLRF control was developed. This LLRF module will be first utilized for an X-band (11.424 GHz) transverse deflector system* for SACLA. A pulsed X-band RF signal is generated by upconverting a 476 MHz IF signal from the DAC and RF signals from the X-band high-power components are converted to 476 MHz IF signals and digitized by ADCs. The IF signal is converted to a baseband IQ signal and the phase and amplitude are obtained. Since the latency of ADC, DAC, and FPGA is as short as several 100 ns, the intra-pulse feedback control is anticipated to stabilize the phase and amplitude of the acceleration RF field. This presentation will give the design and basic performance of the LLRF controller.
Footnotes
*K. Yasutome et al., “Development of High-power RF Components for an X-band Transverse Deflector System at SACLA”, this conference.
Region represented | Asia |
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Paper preparation format | LaTeX |